dectember 1997 1/3 this is preliminary information on a new product in development or undergoing evaluation. details are subject to change without notice. r st92195 64k rom hcmos mcu with on-screen-display and teletext data slicer brief data n register file based 8/16 bit core architecture with run, wfi, slow and halt modes n 0c to +70c operating temperature range available n up to 24 mhz operation @ 5v10% n minimum instruction cycle time: 375ns at 16mhz internal clock n 64k bytes rom n 256 bytes ram of register file (accumulators or index registers) n 256 bytes of on-chip static ram n 8k bytes of tdsram (teletext and display ram) n 56-lead shrink dip package n 28 fully programmable i/o pins n serial peripheral interface n flexible clock controller for osd, data slicer and core clocks running from one single low frequency external crystal. n enhanced display controller with 26 rows of 40/80 characters C serial and parallel attributes C 10x10 dot matrix, 512 rom characters, defin- able by user C 4/3 and 16/9 supported C rounding, fringe, double width, double height, scrolling, cursor, full background colour, semi- transparent mode and reduced intensity col- our supported n teletext unit, including data slicer, acquisition unit and up to 8k bytes ram for data storage n vps and wide screen signa lling slicer n integrated sync extractor and sync controller n 14-bit voltage synthesis for tuning reference voltage n up to 6 external interrupts plus 1 non-maskable interrupt n 8 x 8-bit programmable pwm outputs with 5v open-drain or push-pull capability n 16-bit watchdog timer with 8-bit prescaler n 16-bit standard timer with 8-bit prescaler usable as a watchdog timer n 3-channel analog-to-digital converter; 6-bit guaranteed n rich instruction set and 14-addressing modes n versatile development tools, including assembler, linker, c-compiler, archiver, source level debugger and hardware emulators with real-time operating system available from third parties n piggyback board available for prototyping (see end of datasheet for ordering information) psdip56 1
2/3 st92195 1 description of the st92195 the st92195 is a member of the st9+ family of microcontrollers, completely developed and pro- duced by sgs-thomson microelectronics using a proprietary n-well hcmos process. the nucleus of the st92195 is the advanced core which includes the central processing unit (cpu), the alu, the register file and the interrupt con- troller. the core has independent memory and register buses to add to the efficiency of the code. a set of on-chip peripherals form a complete sys- tem for tv set and vcr applications: C voltage synthesis C vps/wss slicer C teletext slicer C teletext display ram C osd additional peripherals include a watchdog timer , a serial peripheral interface (spi), a 16-bit timer and an a/d converter. figure 1. st92195 block diagram n 2 memory bus i/o port 0 register bus voltage synthesis p.w.m. d/a con- verter spi i/o port 4 p.w.m output i/o port 5 (spi) 64k bytes rom teletext data slicer sync. extrac- tion 8k bytes tdsram tri 256 bytes ram standard timer timings ctrl unit 16-bit timer/ watchdog vps/wss data slicer i/o port 2 adc/vs adc cvbs1 i/o port 3 cso sync control vsync hsync/ csync on screen display pll pxfm/ vr02113a nmi int0 int7 256 bytes register file st9+ core 8/16 bits cpu interrupt management rccu oscin oscout reset p0[7:0] 8 ain1 wscr wscf cvbs2 txcf 6 ain2 ain3 vs01 vs02 4 reset0 cso r/g/b/fb 8 pwm0 pwm7 extrg sdo/sdi sck
3/3 st92195 notes: information furnished is believed to be accurate and reliable. however, sgs-thomson microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of sgs-thomson microelectronics. specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. sgs-thomson microelectronics products are not authorized for use as critical components in life support devices or systems without the express written approval of sgs-thomson microelectronics. ? 1997 sgs-thomson microelectronics - all rights reserved. purchase of i 2 c components by sgs-thomson microelectronics conveys a license under the philips i 2 c patent. rights to use these components in an i 2 c system is granted provided that the system conforms to the i 2 c standard specification as defined by philips. sgs-thomson microelectronics group of companies australia - brazil - canada - china - france - germany - italy - japan - korea - malaysia - malta - morocco - the netherlands - singapore spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a.
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